cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 1/9 MTP425J3 cystek product specification p-channel enhancement mode power mosfet MTP425J3 features ? single drive requirement ? low on-resistance ? fast switching characteristic ? pb-free lead plating and halogen-free package symbol outline ordering information device package shipping MTP425J3-0-t3-g to-252 (pb-free lead plating an d halogen-free package) 2500 pcs / tape & reel to-252(dpak) MTP425J3 g gate d drain s source bv dss -30v i d -50a r ds(on) @v gs =-10v, i d =-10a 10m (typ) r ds(on) @v gs =-5v, i d =-7a 14m (typ) g d s environment friendly grade : s for rohs compliant products, g for rohs compliant and green compound products packing spec, t3 : 2500 pc s / tape & reel, 13? reel product rank, zero for no rank products product name
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 2/9 MTP425J3 cystek product specification absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -30 gate-source voltage v gs 25 v continuous drain current @v gs =-10v, t c =25 c -50 continuous drain current @v gs =-10v, t c =100 c -32 continuous drain current @v gs =-10v, t a =25 c -11 continuous drain current @v gs =-10v, t a =100 c i d -7 pulsed drain current i dm -100 *1 a t c =25 50 *4 t c =100 20 *4 t a =25 2.5 power dissipation t a =100 p d 1.0 w single pulse avalanche energy e as 30 *2 mj single pulse avalanche current i as -11 a operating junction and storage temperature tj, tstg -55~+150 c thermal data parameter symbol value unit thermal resistance, junction-to-case, max r th,j-c 2.5 c/w thermal resistance, junction-to-ambient, max r th,j-a 50 *3 c/w note : *1. pulse width limited by safe operating area. *2 . tj=25 c, v dd =-15v, l=0.5mh, r g =25 . *3 . the value of rt h,j-a is measured with the device mounted on 1 in 2 fr-4 board with 2 oz. copper, in a still air environment with t a =25 c. the value in any given application depends on the user?s specific board design. *4 . the power dissipation p d is more useful in setting the upper dissipation lim it for cases where additional heatsinking is used. it is used to determined the current rating, when this rating falls below the package limit. characteristics (tj=25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -30 - - v v gs =0, i d =-250 a v gs(th) -1.0 -1.5 -2.5 v v ds = v gs , i d =-250 a g fs - 20 - s v ds =-5v, i d =-10a i gss - - 100 na v gs = 25 i dss - - -1 v ds =-30v, v gs =0 i dss - - -5 a v ds =-24v, v gs =0, tj=55 c *r ds(on) - 9.7 13 v gs =-10v, i d =-10a *r ds(on) - 14 18 m v gs =-5v, i d =-7a dynamic *qg - 32 - *qgs - 11.3 - *qgd - 8.4 - nc i d =-25a, v ds =-15v, v gs =-10v
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 3/9 MTP425J3 cystek product specification *t d(on) - 17 - *tr - 10 - *t d(off) - 85 - *t f - 23 - ns v ds =-15v, v gs =-10v, r g =6 , i d =-1a ciss - 2825 - coss - 248 - crss - 191 - pf v gs =0v, v ds =-15v, f=1mhz source-drain diode *v sd - -0.75 -1.2 v i s =-3a, v gs =0v *i s - - -50 a *trr - 26 - ns *qrr - 18 - nc i s =-25a, v gs =0, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% recommended soldering footprint
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 4/9 MTP425J3 cystek product specification typical characteristics typical output characteristics 0 10 20 30 40 50 60 70 80 90 100 012345 -v ds , drain-source voltage(v) -i d , drain current(a) -v gs =3v 10v,9v, 8v, 7v, 6v, 5v 4v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 180 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 1 10 100 1000 0.01 0.1 1 10 100 -i d , drain current(a) r ds( on) , static drain-source on-state resistance(m) v gs =-2.5v v gs =-10v v gs =-4.5v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 0 5 10 15 20 -i dr , reverse drain current(a) -v sd , source-drain voltage(v) tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 0246810 -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-10a drain-source on-state resistance vs junction tempearture 0 0.4 0.8 1.2 1.6 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-10v, i d =-10a r ds( on) @tj=25c : 10m
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 5/9 MTP425J3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -20 20 60 100 140 tj, junction temperature(c) -v gs( th) , normalized threshold voltage i d =-250 a forward transfer admittance vs drain current 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 -i d , drain current(a) g fs , forward transfer admittance(s) v ds =-5v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 5 10 15 20 25 30 35 40 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-25a v ds =-15v maximum safe operating area 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current(a) dc 1ms 100 s 1s r ds( on) limit t c =25c, tj=150, v gs =-10v r jc =2.5c/w, single pulse 10ms 100ms maximum drain current vs casetemperature 0 10 20 30 40 50 60 25 50 75 100 125 150 175 t c , case temperature(c) -i d , maximum drain current(a) v gs =-10v,r jc =2.5c/w
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 6/9 MTP425J3 cystek product specification typical characteristics(cont.) single pulse power rating, junction to ambient (note on page 2) 0 10 20 30 40 50 0.01 0.1 1 10 100 pulse width(s) power (w) t j(max) =150c t a =25c ja =50c/w power derating curve 0 10 20 30 40 50 60 0 20 40 60 80 100 120 140 160 t c , case temperature() p d , power dissipation(w) transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t1/t2 3.t jm -t a =p dm *r ja (t) 4.r ja =50c/w
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 7/9 MTP425J3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 8/9 MTP425J3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c391j3 issued date : 2012.07.19 revised date : 2013.12.25 page no. : 9/9 MTP425J3 cystek product specification to-252 dimension inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead : pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . marking: style: pin 1.gate 2.drain 3.source 4.drain 3-lead to-252 plastic surface mount package cystek package code: j3 device name date code 425 1 2 3 4
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